Columbia University

Technology Ventures

Compact on-chip sensor for accurate monitoring of circuit temperatures with high voltage scalability

Technology #cu15295

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Researchers
Mingoo Seok
Managed By
Greg Maskel
Patent Protection
US Patent Pending 20170234816

Very-large-scale integration (VLSI) circuit densities and clock-speeds are continually increasing. This enables the system to be more powerful, but it also can cause localized thermal hotspots to develop, which can result in overheating and chip malfunction. Current dynamic thermal management systems, which are designed to detect and manage these hotspots, typically must compromise between size, accuracy, and power consumption of temperature sensors. This technology is an ultra-compact on-chip sensor for dense thermal monitoring in digital VLSI systems. It is capable of greater accuracy of temperature monitoring and higher voltage scalability, facilitating lower sensor power usage. As such, the technology provides a more effective and efficient way of managing thermal hotspots that occur in complex digital circuit designs.

Thermal sensor enabling greater power efficiency in very-large-scale integration systems

Current temperature sensors for dynamic thermal management in VLSI systems are either too large for practical circuit design, do not achieve the desired temperature sensing accuracy, or have low voltage scalability and therefore can consume too much power. This technology’s sensor design exploits the linear relationship between the transistor threshold voltage and temperature, thereby accurately determining temperature information by measuring threshold voltage. This method allows a sensor design that has a significantly smaller size, greater temperature-sensing accuracy, and lower power consumption than other on-chip temperature sensors. Overall, this technology is a solution that is ideal for on-chip dense thermal monitoring and increasing power efficiency in VLSI circuits.

A prototype of the technology has been tested in a 65 nm CMOS and demonstrated to achieve a 9x smaller chip footprint (30.1 µm²) with 3x greater post-calibration accuracy (3σ-error of less than 1.1ºC from 0 to 100°C) and 0.2 V better voltage scalability (0.4 to 1 V) than current technologies.

Lead Inventor:

Mingoo Seok, Ph.D.

Applications:

  • Multi-core microprocessors
  • System-on-Chip circuits
  • Graphics process units (GPUs)
  • Low-power integrated circuits for mobile devices
  • Implanted biomedical devices integrated circuits
  • Remote wireless sensing chips
  • Systems requiring ultra-dynamic-voltage-scaling
  • Systems using dynamic thermal management in conjunction with machine learning

Advantages:

  • Improved chip footprint (compactness)
  • Greater post-calibration accuracy
  • Enhanced voltage scalability

Patent Information:

Patent Pending

Tech Ventures Reference: IR CU15295

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